koulib@sh.itjust.works to Linux@lemmy.mlEnglish · 2 years agoWhich new Protocol or Standard are you most excited about?message-squaremessage-square36fedilinkarrow-up15arrow-down10file-text
arrow-up15arrow-down1message-squareWhich new Protocol or Standard are you most excited about?koulib@sh.itjust.works to Linux@lemmy.mlEnglish · 2 years agomessage-square36fedilinkfile-text
minus-squaredeur@feddit.nllinkfedilinkarrow-up1·edit-22 years agoIn principle it’s just “slimmer ARM”. RISC-V is also extremely dedicated to using memory mapped IO rather than older style IO x86_64 supports. Think lots of registers, a fun zero register that is always zero, and memory mapped IO.
minus-squarecaseyweederman@lemmy.calinkfedilinkarrow-up1·2 years agoARM is also reduced-instruction set but I don’t know how they differ. Is the instruction set somehow more reduced?
minus-squareMonkderVierte@lemmy.mllinkfedilinkarrow-up1·2 years agoAren’t they more like a hybrid instruction set and architecture?
minus-squaremvirts@lemmy.worldlinkfedilinkarrow-up1·2 years agoI for one think we need a register for each unsigned integer, why is zero so special? :P Or if we can’t get that, at least every power of 2 and power of 2 minus 1. Maybe I can submit a proposal for risc-VI 🤣
minus-squareporl@lemmy.worldlinkfedilinkEnglisharrow-up1·2 years agoI think a register for each of the primes should be enough.
minus-squarePetteriPano@lemmy.worldlinkfedilinkarrow-up1·2 years ago Maybe I can submit a proposal for risc-VI 🤣 No need! You can make your own custom extension! If the silicon doesn’t support it, then you can provide firmware to emulate it.
In principle it’s just “slimmer ARM”. RISC-V is also extremely dedicated to using memory mapped IO rather than older style IO x86_64 supports.
Think lots of registers, a fun zero register that is always zero, and memory mapped IO.
ARM is also reduced-instruction set but I don’t know how they differ. Is the instruction set somehow more reduced?
Aren’t they more like a hybrid instruction set and architecture?
I for one think we need a register for each unsigned integer, why is zero so special? :P
Or if we can’t get that, at least every power of 2 and power of 2 minus 1.
Maybe I can submit a proposal for risc-VI 🤣
I think a register for each of the primes should be enough.
No need! You can make your own custom extension! If the silicon doesn’t support it, then you can provide firmware to emulate it.